AI
PQC as a Fresh Attack Surface
Quantum computers aren’t breaking crypto yet, but PQC is already shipping. NIST standardized Dilithium and SPHINCS+ in 2024; Dilithium is mandatory under the CNSA framework for all digital signatures. OpenTitan, backed by Google, uses SPHINCS+ for PQC secure boot and plans deployment in Chromebooks and data centers. Calipra 2.0 is adding Dilithium to its root-of-trust design. No public hardware targets existed when research began, so Garipay ported the PQM4 library and XMSS/SPHINCS+ reference implementations to bare-metal firmware on an STM32F4 and attacked that device directly.
How Voltage Fault Injection Works
Voltage fault injection works by dropping supply voltage at a precise moment. Too narrow a glitch or too small a drop and execution continues normally. Too wide or too deep and the device resets or stops responding. The useful window between those two outcomes produces instruction skips or wrong computational results without killing the device. The test setup ran an STM32F4 target over serial, with an FPGA providing nanosecond-precision trigger and reset control, a programmable power supply injecting glitches, and an oscilloscope monitoring every run.
Breaking Dilithium Verification
Dilithium verification computes AZ minus C·T1·2^d, corrects with the hint vector, then checks that the recomputed challenge C matches the signature. Zeroing or minimizing C·T1·2^d lets an attacker pass a signature built from public-key values alone. Four for-loops are viable fault points: challenge initialization, the shift-by-D step (D=13), the subtraction, and T1 unpacking.
The Dilithium challenge-sampling bypass (15:38) left all poly_challenge coefficients at zero. The Dilithium subtraction-skip bypass (17:39) skipped polyex_sub entirely. Both showed red success points on the fault injection plot.
“the attack surface is pretty huge and there are lot of things that can go wrong at the directive verification” — Fikret Garipay
Forging Signatures Against WOTS+ Hash Chains
WOTS+ is the one-time signature building block inside both XMSS and SPHINCS+. The checksum prevents naive forgery: lowering a message chunk during signing increases the remaining hash count, and since hashing is one-way you cannot go back. Brute-forcing a qualifying message hash takes up to 32 GPU-years for single-tree XMSS but under one hour for multi-tree XMSS and SPHINCS+ on a high-end GPU. The XMSS hash-chain skip bypass (29:40) then skips the checksum chain’s for-loop during verification, forcing the device to accept the forged firmware.
Fault-Resistant Library Still Falls
FoxCrypto released a fault-resistant XMSS library before the WOTS+ attack paper was published. It uses hardened memcmp, checks values multiple times (sometimes three), and validates return values throughout. Partial H-chain skip requires a second fault to bypass the subsequent assert. The full H-chain skip leaves the for-loop entirely, touching no counters or intermediate values, so none of the hardened checks ever fire. The Hardened XMSS full H-chain skip (33:11) confirms this: a single voltage fault bypassed their verified XMSS implementation on the same STM32F4 setup.
“even the quantum safe code um can be glitched and PQC is not immune to fault injection techniques that u we developed so far.” — Fikret Garipay
Notable Quotes
even the quantum safe code um can be glitched and PQC is not immune to fault injection techniques that u we developed so far. Fikret Garipay · ▶ 33:46
the attack surface is pretty huge and there are lot of things that can go wrong at the directive verification Fikret Garipay · ▶ 19:00
and spin plus it um is doable under one hour with high-end GPU Fikret Garipay · ▶ 29:19
Key Takeaways
- Dilithium verification has at least four distinct fault injection entry points, all defeated with voltage glitching on an STM32F4.
- XMSS and SPHINCS+ share the same WOTS+ code path; any fault against one applies directly to the other.
- A fault-resistant XMSS library with hardened memcmp still falls to a single full H-chain skip fault in the generate_chain loop.